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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14529B Dual 4-Channel Analog Data Selector The MC14529B analog data selector is a dual 4-channel or single 8-channel device depending on the input coding. The device is suitable for digital as well as analog application, including various one-of-four and one-of-eight data selector functions. Since the device has bidirectional analog characteristics it can also be used as a dual binary to 1-of-4 or a binary to 1-of-8 decoder. * Data Paths Are Bidirectional * 3-State Outputs * Linear "On" Resistance * Supply Voltage Range = 3.0 Vdc to 18 Vdc * Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load over the Rated Temperature Range. MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol VDD Parameter DC Supply Voltage Value Unit V V L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B IIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I III IIIIIIII I I I I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII I IIII IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I - 0.5 to + 18.0 10 500 Vin, Vout Iin, Iout PD TL Input or Output Voltage (DC or Transient) - 0.5 to VDD + 0.5 Input or Output Current (DC or Transient), per Pin Power Dissipation, per Package Storage Temperature mA mW Tstg - 65 to + 150 260 ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = - 55 to 125C for all packages. _C _C BLOCK DIAGRAM 3-STATE OUTPUT ENABLE STROBE X 1 6 7 2 3 4 5 A B X0 X1 X2 X3 Lead Temperature (8-Second Soldering) * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C Ceramic "L" Packages: - 12 mW/_C From 100_C To 125_C TRUTH TABLE (X = Don't Care) STX 1 1 1 1 1 1 1 1 0 0 0 0 0 STY 1 1 1 1 0 0 0 0 1 1 1 1 0 B 0 0 1 1 0 0 1 1 0 0 1 1 X A 0 1 0 1 0 1 0 1 0 1 0 1 X Z X0 X1 X2 X3 X0 X1 X2 X3 Y0 Y1 Y2 Y3 High Impedance W Y0 Y1 Y2 Y3 Dual 4-Channel Mode 2 Outputs Z 9 Single 8-Channel Mode 1 Output (Z and W tied together) 14 13 12 11 STROBE Y 15 Y0 Y1 Y2 Y3 W 10 VDD = PIN 16 VSS = PIN 8 This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. REV 3 1/94 (c)MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995 MC14529B 1 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII ELECTRICAL CHARACTERISTICS - 55_C 25_C 125_C Characteristic Symbol VDD Test Conditions Min Max Min Typ # Max Min Max Unit SUPPLY REQUIREMENTS (Voltages Referenced to VEE) Power Supply Voltage Range Quiescent Current Per Package VDD IDD -- 5.0 10 15 VDD - 3.0 VSS VEE Control Inputs: Vin = VSS or VDD, Switch I/O: VSS VI/O VDD, and Vswitch 500 mV** 3.0 -- -- -- 18 1.0 1.0 2.0 3.0 -- -- -- -- 0.005 0.010 0.015 18 1.0 1.0 2.0 3.0 -- -- -- 18 60 60 120 V A v v v Total Supply Current (Dynamic Plus Quiescent, Per Package ID(AV) 5.0 10 15 TA = 25_C only (The channel component, (Vin - Vout) / Ron, is not included.) Typical (0.07 A/kHz) f + IDD (0.20 A/kHz) f + IDD (0.36 A/kHz) f + IDD A CONTROL INPUTS -- INHIBIT, A, B (Voltages Referenced to VSS) Low-Level Input Voltage VIL 5.0 10 15 5.0 10 15 15 -- Ron = per spec, Ioff = per spec Ron = per spec, Ioff = per spec Vin = 0 or VDD -- -- -- 3.5 7.0 11 -- -- 1.5 3.0 4.0 -- -- -- 0.1 -- -- -- -- 3.5 7.0 11 -- -- 2.25 4.50 6.75 2.75 5.50 8.25 0.00001 5.0 1.5 3.0 4.0 -- -- -- 0.1 7.5 -- -- -- 3.5 7.0 11 -- -- 1.5 3.0 4.0 -- -- -- 1.0 -- V High-Level Input Voltage VIH V Input Leakage Current Input Capacitance Iin Cin A pF SWITCHES IN/OUT AND COMMONS OUT/IN -- W, Z (Voltages Referenced to VEE) Recommended Peak-to- Peak Voltage Into or Out of the Switch Recommended Static or Dynamic Voltage Across the Switch** (Figure 5) Output Offset Voltage ON Resistance VI/O -- Channel On or Off 0 VDD 0 -- VDD 0 VDD Vp-p Vswitch -- Channel On 0 600 0 -- 600 0 300 mV VOO Ron -- 10 15 Vin = 0 V, No Load Vswitch 500 mV**, Vin = VIL or VIH (Control), and Vin = 0 to VDD (Switch) v -- -- -- -- 400 240 -- -- -- 10 120 80 -- 480 270 -- -- -- -- 560 350 V ON Resistance Between Any Two Channels in the Same Package Off-Channel Leakage Current (Figure 10) Ron 10 15 15 Vin = VIL or VIH (Control) Channel to Channel or Any One Channel Inhibit = VDD Inhibit = VDD Pins Not Adjacent Pins Adjacent -- -- -- -- 100 -- -- -- 15 10 0.05 -- -- 100 -- -- -- -- -- 1000 Ioff nA Capacitance, Switch I/O Capacitance, Common O/I Capacitance, Feedthrough (Channel Off) CI/O CO/I CI/O -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 8.0 20 0.15 0.47 -- -- -- -- -- -- -- -- -- -- -- -- pF pF pF #Data labelled "Typ" is not to be used for design purposes, but is intended as an indication of the IC's potential performance. ** For voltage drops across the switch (Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) MC14529B 2 MOTOROLA CMOS LOGIC DATA SWTCHING CHARACTERISTICS (TA = 25_C) Characteristic Vin to Vout Propagation Delay Time (CL = 50 pF, RL = 1.0 k) Propagation Delay Time, Control to Output, Vin = VDD or VSS (CL = 50 pF, RL = 1.0 k) Crosstalk, Control to Output (CL = 50 pF, RL = 1.0 k Rout = 10 k) Control Input Pulse Frequency (CL = 50 pF, RL = 1.0 k) Noise Voltage (f = 100 Hz) Figure 7 Symbol tPLH, tPHL VSS 0.0 VDD 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 Sine Wave Distortion (Vin = 1.77 Vdc RMS Centered @ 0.0 Vdc, RL = 10 k, f = 1.0 kHz) Off-Channel Leakage Current (Vin = + 5.0 Vdc, Vout = - 5.0 Vdc) (Vin = - 5.0 Vdc, Vout = + 5.0 Vdc) (Vin = + 7.5 Vdc, Vout = - 7.5 Vdc) (Vin = - 7.5 Vdc, Vout = + 7.5 Vdc) Insertion Loss (Vin = 1.77 Vdc RMS centered @ 0.0 Vdc, f = 1.0 MHz) Iloss = 20 Log10 (Vout / Vin) (RL = 1.0 k) (RL = 10 k) (RL = 100 k) (RL = 1.0 M) Bandwidth (- 3 dB) (Vin = 1.77 Vdc RMS centered @ 0.0 Vdc) (RL = 1.0 k) (RL = 10 k) (RL = 100 k) (RL = 1.0 M) Feedthrough and Crosstalk 20 Log10 (Vout / Vin) = - 50 dB (RL = 1.0 k) (RL = 10 k) (RL = 100 k) (RL = 1.0 M) -- -- - 5.0 5.0 Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ # 20 10 8.0 140 70 50 5.0 5.0 5.0 5.0 10 12 24 25 30 12 12 15 0.36 Max 40 20 15 400 160 120 -- -- 2.5 6.2 8.3 -- -- -- -- -- -- -- % MHz Unit ns 8 tPLZ, tPZL, tPHZ, tPZH -- 0.0 ns 9 0.0 mV 10 fin 0.0 11, 12 -- 0.0 nV/ cycle -- Ioff - 5.0 - 5.0 - 7.5 - 7.5 5.0 5.0 7.5 7.5 5.0 -- -- -- -- nA 0.001 0.001 0.0015 0.0015 125 125 250 250 dB 13 -- - 5.0 -- -- -- -- -- BW - 5.0 5.0 2.0 0.8 0.25 0.01 -- -- -- -- MHz -- -- -- -- -- -- - 5.0 5.0 -- -- -- -- 35 28 27 26 -- -- -- -- MHz 850 100 12 1.5 -- -- -- -- #Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. MOTOROLA CMOS LOGIC DATA MC14529B 3 VDD STX STY A B X3 Y3 Z W VSS Pins 2, 3, 4, 12, 13 and 14 are left open. OUT VSS VSS = 0.0 V VDD Vin V VIL: VC is raised from VSS until VC = VIL. VIL: at VC = VIL: IS = 10 A with Vin = VSS, Vout = VDD VIL: Vin = VDD, Vout = VSS. VIH: When VC = VIH to VDD, the switch is ON and the RON VIH: specifications are met. IS 1k VN Figure 1. Output Voltage Test Circuit Figure 2. Noise Immunity Test Circuit VDD STX = STY = VDD ID VDD PULSE GENERATOR OUT 10 k fc A0, A1 VSS Vin Vin VSS RL VDD OUT PD = VDD x ID Figure 3. Quiescent Power Dissipation Test Circuit Figure 4. RON Characteristics Test Circuit TYPICAL RON versus INPUT VOLTAGE 250 R ON "ON" RESISTANCE (OHMS) R ON "ON" RESISTANCE (OHMS) VDD = 5 V VSS = -5 V 250 VDD = 10 V VSS = 0 V VDD = 15 V VSS = 0 V 200 200 150 VDD = 7.5 V VSS = -7.5 V 100 150 100 50 50 0 -10 -5 0 5 10 0 0 5 10 15 20 25 Vin, INPUT VOLTAGE (Vdc) Vin, INPUT VOLTAGE (Vdc) Figure 5. Figure 6. MC14529B 4 MOTOROLA CMOS LOGIC DATA OUT VSS VDD Vin 20 ns 20 ns 90% 50% Vin tPLH tPHL 50% Vout 20 ns VDD 10% VSS STX, STY tPZH Vout Vout 10% tPZL 90% RL CL STX, STY Vout RL Vin 50% 90% 10% VX VDD CL V tPHZ SS Vin 90% Vx tPLZ 10% Vin Vx VDD VSS VSS VDD Figure 7. Propagation Delay Test Circuit and Waveforms Figure 8. Turn-On Delay Time Test Circuit and Waveforms OUT A OR B CONTROL LOGIC Vin 1k Vin 10 k 50 pF VFeedthrough X, Y INPUT RL VSS VDD VSS OUT RL VDD +2.5 Vdc 0.0 Vdc -2.5 Vdc X, Y INPUT Figure 9. Crosstalk Test Circuit Figure 10. Frequency Response Test Circuit 35 NOISE VOLTAGE (nV/ CYCLE) 30 VDD = 15 Vdc 25 10 Vdc 20 5.0 Vdc 15 10 5.0 0 10 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k OUT VSS IN VDD QUAN-TECH MODEL 2283 OR EQUIV Figure 11. Noise Voltage Test Circuit p MOTOROLA CMOS LOGIC DATA Figure 12. Typical Noise Characteristics MC14529B 5 2.0 0 TYPICAL INSERTION LOSS (dB) -2.0 1.0 kW -4.0 -6.0 -8.0 -10 -12 10 k 100 k 1.0 M 10 M fin, INPUT FREQUENCY (Hz) 100 M -3.0 dB (RL = 1.0 MW) -3.0 dB (RL = 10 kW) -3.0 dB (RL = 1.0 kW) RL = 1 MW AND 100 kW 10 kW PIN ASSIGNMENT STX X0 X1 X2 X3 A B VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD STY Y0 Y1 Y2 Y3 W Z Figure 13. Typical Insertion Loss/Bandwidth Characteristics LOGIC DIAGRAM B 7 6 A STY STX 15 1 2 X0 3 X1 9 Z 4 X2 5 X3 14 Y0 13 Y1 10 W 12 Y2 11 Y3 VDD = PIN 16 VSS = PIN 8 MC14529B 6 MOTOROLA CMOS LOGIC DATA OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620-10 ISSUE V -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 --- 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 --- 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 -B- 1 8 C L -T- SEATING PLANE N E F D G 16 PL K M J 16 PL 0.25 (0.010) M M TB S 0.25 (0.010) TA S P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 B 1 8 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M MOTOROLA CMOS LOGIC DATA MC14529B 7 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J -A- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 9 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 MC14529B 8 *MC14529B/D* MOTOROLA CMOS LOGIC DATA MC14529B/D |
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